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that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com document 600069 rev. 03 copyright ? 2009, that corporation that corporation that analog engine ? ic dynamics processor that 4301, 4301a features high-performance voltage controlled amplifier high-performance rms-level detector three general-purpose opamps wide dynamic range: >115 db low thd: <0.03% low cost dip & surface-mount packages applications compressors limiters gates expanders de-essers duckers noise reduction systems wide-range level meters description that 4301 dynamics processor, dubbed ?that analog engine,? combines in a single ic all the active circuitry needed to construct a wide range of dynamics processors. the 4301 includes a high-performance, exponen- tially-controlled vca, a log-responding rms-level sensor and three general- purpose opamps. the vca provides two opposing-polarity, volt- age-sensitive control ports. dynamic range ex- ceeds 115 db, and thd is typically 0.003% at 0 db gain. in the 4301a, the vca is selected for low thd at extremely high levels. the rms de - tector provides accurate rms-to-dc conversion over an 80 db dynamic range for signals with crest factors up to 10. one opamp is dedicated as a current-to-voltage converter for the vca, while the other two may be used for the signal path or control voltage processing. the combination of exponential vca gain con- trol and logarithmic detector response ? ?deci- bel-linear? response ? simplifies the mathematics of designing the control paths of dynamics processors. this makes it easy to de- sign audio compressors, limiters, gates, ex- panders, de-essers, duckers, noise reduction systems and the like. the high level of integra - tion ensures excellent temperature tracking be - tween the vca and the detector, while minimizing the external parts count. out ct it in - + - 1 18 11 17 14 13 12 15 16 19 20 2 5 4 9 10 8 6 7 - oa1 + vcc that4301 ec- ec+ in out sym vca oa3 + oa2 gnd vee rms figure 1. block diagram (pin numbers are for dip only) model 20 pin dip pkg 30 pin dmp (so) pkg 4301 rohs compliant 4301p20-i 4301m30-i 4301a rohs compliant 4301ap20-i --- 4301 --- 4301m30 4301a 4301ap20 --- table 1. ordering information
that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 2 document 600069 rev 03 specifications 1,2 absolute maximum ratings (t a = 25c) positive supply voltage (v cc ) +18 v negative supply voltage (v ee ) -18 v supply current (i cc )20ma power dissipation (p d )(t a = 75c) 700 mw operating temperature range (t op ) 0 to +70c storage temperature range (t st ) -40 to +125c overall electrical characteristics parameter symbol conditions min typ max units positive supply voltage v cc +7 ? +15 v negative supply voltage v ee -7 ? -15 v positive supply current i cc ?1218 ma negative supply current i ee ? -12 -18 ma thermal resistance j-c so-package ? 140 ? c/w vca electrical characteristics 3 4301 4301a parameter symbol conditions min typ max min typ max units input bias current i b(vca) no signal ? 30 400 ? 30 400 pa input offset voltage v off(vca in) no signal ? 4 15 ? 4 15 mv input signal current i in(vca) or i out(vca) ? 175 750 ? 175 750 arms gain at 0v control g 0 e c+ =e c? = 0.000v -0.4 0.0 +0.4 -0.4 0.0 +0.4 db gain-control constant t a = 25c (t chip 55c) -60 db < gain < +40db e c+ /gain (db) e c+ & sym 6.4 6.5 6.6 6.4 6.5 6.6 mv/db e c- /gain (db) e c- -6.4 -6.5 -6.6 -6.4 -6.5 -6.6 mv/db gain-control tempco e c / t chip ref t chip = 27c ? +0.33 ? ? +0.33 ? %/c gain-control linearity -60 to +40 db gain ? 0.5 2 ? 0.5 2 % off isolation e c+ =sym=-375mv, e c- =+375mv 110 115 ? 110 115 ? db output offset voltage change v off(out) r out = 20k 0 db gain ? 1 3 ? 1 3 mv +15 db gain ? 2 10 ? 2 10 mv +30 db gain ? 5 25 ? 5 25 mv gain cell idling current i idle ?20? ?20? a output noise e n(out) 20 hz-20 khz r out = 20k 0 db gain ? -96 -94 ? -96 -94 dbv +15 db gain ? -85 -83 ? -85 -83 dbv total harmonic distortion thd v in = 0 dbv, 1 khz 0 db gain ? 0.003 0.007 ? 0.003 0.007 % 1. all specifications subject to change without notice. 2. unless otherwise noted, t a =25c, v cc = +15v, v ee = -15v; vca sym adjusted for min th d@1v,1 khz, 0 db gain. 3. test circuit is the vca section only from figure 2.
that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation that 4301 analog engine ic dynamics processor page 3 specifications 1,2 (cont?d.) vca electrical characteristics 3 (cont?d.) 4301 4301a parameter symbol conditions min typ max min typ max units total harmonic distortion (cont?d.) thd v in = +10 dbv, 1 khz 0 db gain ? 0.03 0.07 ? 0.03 0.07 % ?15 db gain ? 0.035 0.09 ? 0.035 0.09 % v out = +10 dbv, 1 khz +15 db gain ? 0.035 0.09 ? 0.035 0.09 % v in = +19.5 dbv, 1 khz 0 db gain ? ? ? ? 0.05 0.09 % symmetry control voltage v sym minimum thd -2.5 0 +2.5 -2.5 0 +2.5 mv rms detector electrical characteristics 4 parameter symbol conditions min typ max units input bias current i b (rms) no signal ? 30 400 pa input offset voltage v off(rms in) no signal ? 4 15 mv input signal current i in(rms) ? 175 750 a input current for 0 v output i in0 i t = 7.5 a 6 8.5 12 a output scale factor e o / 20log( i in /i in0 ) 31.6na< i in < 1ma t a = 25c (t chip 55c) 6.4 6.5 6.6 mv/db scale factor match (rms to vca) -20 db < vca gain < +20 db 1 a< i in (det) <100 a .985 1 1.015 output linearity f in = 1khz 1 a< i in < 100 a ? 0.1 ? db 100na < i in < 316 a ? 0.5 ? db 31.6na < i in < 1ma ? 1.5 ? db rectifier balance f in = 100 hz, = .001 s 1 a< i in < 100 a ?20 ? 20 % crest factor 1ms pulse repetition rate 0.2 db error ? 3.5 ? 0.5 db error ? 5 ? 1.0 db error ? 10 ? maximum frequency for 2 db additional error i in 10 a ? 100 ? khz i in 3 a ? 45 ? khz i in 300na ? 7 ? khz timing current set range i t 1.5 7.5 15 a voltage at i t pin i t = 7.5 a -10 +20 +50 mv timing current accuracy i ct /i t i t = 7.5 a 0.90 1.1 1.30 filtering time constant t chip =55
c 0 026 . c i t t s output temp. coefficient e o / t chip re: t chip =27
c ? 0.33 ? %/c output current i out ?300mv < v out < +300mv 90 100 ? a 4. except as noted, test circuit is the rms-detector section only from figure 2.
that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 4 document 600069 rev 03 specifications 1,2 (cont?d) opamp electrical characteristics 5 oa1 oa2 oa3 parameter symbol conditions min typ max min typ max min typ max units input offset voltage v os ? 0.5 6? 0.5 6? 0.5 6mv input bias current i b ? 150 500 ? 150 500 ? 150 500 na input offset current i os ? 15 50 ? 15 50 n/a na input voltage range i vr ? 13.5 ? ? 13.5 ? n/a v common mode rej. ratio cmrr r s <10k ? 100 ? ? 100 ? n/a power supply rej. ratio psrr vs= 7v to 15v ? 100 ? ? 100 ? ? 100 ? gain bandwidth product gbw (@50khz) ? 5 ? ? 5 ? ? 5 ? mhz open loop gain a vo r l =10k ? 115 ? ? 110 ? ? 125 ? r l =2k n/a n/a ? 120 ? output voltage swing v o @r l =5k ? 13 ? ? 13 ? ? 14 ? v v o @r l =2k n/a n/a ? ? 13 ? v short circuit output current ? 4 ? ? 4 ? ? 12 ? ma slew rate sr ? 2 ? ? 2 ? ? 2 ? v/ s total harmonic distortion thd 1khz, a v =1, r l =10k ? 0.0007 0.003 ? 0.0007 0.003 ? 0.0007 0.003 % 1khz, a v =?1, r l =2k n/a n/a ? 0.0007 0.003 % input noise voltage density e n f o =1khz ? 6.5 10 ? 7.5 12 ? 7.5 12 nv hz input noise current density i n f o =1khz ? 0.3 ? ? 0.3 ? ? 0.3 ? pa hz 50k r5 47uf c1 10uf c4 22uf c6 300k r4 51 r3 1% r1 1% r2 47pf c2 1% 10k0 r6 47uf c3 1% 2m00 r7 100n c7 100n c8 ct oa2 oa1 vee vcc gnd - + vca - - + vca sym in signal ec- out signal out rms +15v +15v -15v -15v -15v 20k0 20k0 that4301 in rms it sym out in ec- ec+ oa3 out + figure 2. vca and rms detector test circuit 5. test circuit for opamps is a unity-gain follower configuration, with load resistor r l as specified.
that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation that 4301 analog engine ic dynamics processor page 5 pin name dip pin so pin rms in 1 3 i t (i time )24 no connection 3 5 rms out 4 6 c t (c time )57 oa2 -in 6 9 oa2 out 7 10 oa2 +in 8 11 gnd 9 12 vee 10 13 vcc 11 18 oa3 out 12 19 vca out 13 20 sym 14 22 e c+ 15 23 pin name dip pin so pin e c- 16 24 vca in 17 25 oa1 out 18 26 oa1 -in 19 27 oa1 +in 20 28 no connection 1 no connection 2 no connection 8 no connection 14 no connection 15 no connection 16 no connection 17 no connection 21 no connection 29 no connection 30 table 2. pin connections 1 b a c d p j i k n l m o h f g e item a b c d e f g h i j k l m n o p millimeters inches 24.8 max. 0.98 max 24.2 +/-0.2 0.95 +/-0.008 6.4 +/-0.2 0.25 +/-0.008 7.62 +/-0.25 0.30 +/-0.01 2.54 +/-0.15 0.10 +/-0.006 0.46 +0.15 -0.1 0.02 +0.006 -0.004 1.0 +/-0.15 0.04 +/-0.006 1.5 typ. 0.06 typ. 0.98 typ. 0.04 typ. 1.5 0.06 1.75 0.07 3.25 +/-0.15 0.13 +/-0.006 4.7 max. 0.19 max. 0.51 min. 0.02 min. 2.8 min. 0.11 min. 0.25 +0.15 -0.05 0.01 +0.006 -0.002 0-15 figure 3. plastic dual in-line package outline b c j g i h e d a 1 + 0.1 - 0.05 typ. +/- 0.2 + 0.1 - 0.05 +/- 0.4 +/- 0.3 j0.2 i 0.8 h0.15 g2.3 f 0.85 max. e1.0 d 0.4 c10.3 b7.5 15.4 a millimeters item f +/- 0.1 +/- 0.15 inches 0.60 +/- 0.012 0.29 +/- 0.008 0.41 +/- 0.016 0.002 +0.004 -0.002 0.039 typ. 0.033 max. 0.09 +/- 0.006 0.006 +/- 0.004 0.031 0.008 +0.004 -0.002 0-10 figure 4. plastic surface-mount package outline
that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 6 document 600069 rev 03 figure 5. vca gain vs. control voltage (ec-) at 25c figure 6. vca 1khz thd+noise vs. input, -15 db gain representative data figure 7. vca 1khz thd+noise vs. input, +15 db gain figure 8. vca 1khz thd+noise vs. input, 0 db gain figure 9. vca thd vs. frequency, 0 db gain, 1vrms input figure 10. rms output vs. input level, 1 khz & 10 khz figure 11. departure from ideal detector law vs. level figure 12. detector output vs. frequency at various levels
theory of operation that 4301 dynamics processor combines that corporation?s proven voltage-controlled amplifier (vca) and rms-level detector designs with three general-purpose opamps to produce an analog en - gine useful in a variety of dynamics processor appli - cations. for details of the theory of operation of the vca and rms-detector building blocks, the inter - ested reader is referred to that corporation?s data sheets on the 2150 series vcas and the 2252 rms-level detector. theory of the interconnection of exponentially-controlled vcas and log-responding level detectors is covered in that corporation?s ap - plication note an101, the mathematics of log-based dynamic processors . the vca ? in brief that 4301 vca is based on that corporation?s highly successful complementary log-antilog gain cell topology, as used in that 2150-series ic vcas, and the modular 202 series vcas. that 4301 is inte - grated using a fully complementary, bifet process. the combination of fets with high-quality, comple - mentary bipolar transistors (npns and pnps) allows additional flexibility in the design of the vca over previous efforts. input signals are currents to the vca in pin. this pin is a virtual ground, so in normal operation an in- put voltage is converted to input current via an ap- propriately sized resistor (r 1 in figure 2, page 4). because dc offsets present at the input pin and any dc offset in preceeding stages will be modulated by gain changes (thereby becoming audible as thumps), the input pin is normally ac-coupled (c 1 in figure 2). the vca output signal is also a current , inverted with respect to the input current. in normal opera - tion, the output current is converted to a voltage via inverter oa 3 , where the ratio of the conversion is de - termined by the feedback resistor (r 2 , figure 2) con - nected between oa 3 ?s output and its inverting input. the signal path through the vca and oa 3 is noninverting. the gain of the vca is controlled by the voltage applied to e c? ,e c+ , and sym. gain (in decibels) is proportional to e c+ ?e c- , provided e c+ and sym are at essentially the same voltage (see below). the con - stant of proportionality is ?6.5 mv/db for the voltage at e c? , and 6.5 mv/db for the voltage at e c+ and sym. as mentioned, for proper operation, the same voltage must be applied to e c+ and sym, except for a small ( 2.5 mv) dc bias applied between these pins. this bias voltage adjusts for internal mismatches in the vca gain cell which would otherwise cause small differences between the gain of positive and negative half-cycles of the signal. the voltage is usually ap - plied via an external trim potentiometer (r 5 in figure 2), which is adjusted for minimum signal distortion at unity (0 db) gain. the vca may be controlled via e c- , as shown in figure 2, or via the combination of e c+ and sym. this connection is illustrated in figure 13. note that this figure shows only that portion of the circuitry needed to drive the positive vca control port; cir - cuitry associated with oa 1 ,oa 2 and the rms detector has been omitted. while the 4301?s vca circuitry is very similar to that of the that 2150 series vcas, there are several important differences, as follows: 1) supply current for the vca is fixed internally. approximately 2ma is available for the sum of input and output signal currents. (this is also the case in a 2150 series vca when biased as recommended.) 2) the signal current output of the vca is inter - nally connected to the inverting input of an on-chip opamp. in order to provide external feedback around this opamp, this node is brought out to a pin. 3) the control-voltage constant is approximately 6.5 mv/db, due primarily to the higher internal oper - ating temperature of the 4301 compared to that of the 2150 series. 4) the input stage of the 4301 vca uses inte - grated p-channel fets rather than a bias-current corrected bipolar differential amplifier. input bias currents have therefore been reduced. the rms detector ? in brief the 4301?s detector computes rms level by recti - fying input current signals, converting the rectified current to a logarithmic voltage, and applying that voltage to a log-domain filter. the output signal is a dc voltage proportional to the decibel-level of the rms that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation that 4301 analog engine ic dynamics processor page 7 50k r5 47uf c1 300k r4 51 r3 1% 20k0 r1 1% 20k0 r2 47pf c2 ct it that4301 out sym out oa3 oa2 oa1 vee vcc gnd in rms - + ec+ ec- in vca - - ++ vca sym signal in positive control in signal out figure 13. driving the vca via the positive control port
value of the input signal current. some ac component (at twice the input frequency) remains superimposed on the dc output. the ac signal is attenuated by a log-domain filter, which constitutes a single-pole rolloff with cutoff determined by an external capaci - tor and a programmable dc current. as in the vca, input signals are currents to the rms in pin. this input is a virtual ground, so a re - sistor (r 6 in figure 2) is normally used to convert in - put voltages to the desired current. the level detector is capable of accurately resolving signals well below 10 mv (with a 10 k input resistor). however, if the detector is to accurately track such low-level signals, ac coupling is normally required. the log-domain filter cutoff frequency is usually placed well below the frequency range of interest. for an audio-band detector, a typical value would be 5 hz, or a 32 ms time constant ( ). the filter?s time constant is determined by an external capacitor at - tached to the c t pin, and an internal current source (i ct ) connected to c t . the current source is pro - grammed via the i t pin: current in i t is mirrored to i ct with a gain of approximately 1.1. the resulting time constant is approximately equal to 0.026 c t /i t . note that, as a result of the mathematics of rms de- tection, the attack and release time constants are fixed in their relationship to each other. the dc output of the detector is scaled with the same constant of proportionality as the vca gain control: 6.5 mv/db. the detector?s 0 db reference ( i in0 , the input current which cause s 0 v output), is determined by i t as follows: i in0 = 9.6 a i t the de- tector output stage is capable of sinking or sourcing 100 a. differences between the 4301?s rms-level detec - tor circuitry and that of the that 2252 rms detec - tor are as follows: 1) the rectifier in the 4301 rms detector is inter - nally balanced by design, and cannot be balanced via an external control. the 4301 will typically bal - ance positive and negative halves of the input signal within 1.5%, but in extreme cases the mismatch may reach 15%. however, a 15% mismatch will not significantly increase ripple-induced distortion in dynamics processors over that caused by signal ripple alone. 2) the time constant of the 4301?s rms detector is determined by the combination of an external ca - pacitor (connected to the c t pin) and an internal, programmable current source. the current source is equal to 1.1 i t . normally, a resistor is not con - nected directly to the c t pin on the 4301. 3) the 0 db reference point, or level match ,isnot adjustable via an external current source. however, as in the 2252, the level match is affected by the timing current, which, in this case, is drawn from the i t pin and mirrored internally to c t . 4) the input stage of the 4301 rms detector uses integrated p-channel fets rather than a bias-current corrected bipolar differential amplifier. input bias currents are therefore negligible, improv - ing performance at low signal levels. the opamps ? in brief the three opamps in the 4301 are intended for general purpose applications. all are 5 mhz opamps with slew rates of approximately 2v/ s. all use bipo - lar pnp input stages. however, the design of each is optimized for its expected use. therefore, to get the most out of the 4301, it is useful to know the major differences among these opamps. oa 3 , being internally connected to the output of the vca, is intended for current-to-voltage conver- sion. its input noise performance, at 75 . nv hz , complements that of the vca, adding negligible noise at unity gain. its output section is capable of driving a 2k load to within 2v of the power supply rails, making it possible to use this opamp directly as the output stage in single-ended designs. oa 1 is the quietest opamp of the three. its input noise voltage, at 65 . nv hz , makes it the opamp of choice for input stages. note that its output drive ca - pability is limited (in order to reduce the chip?s power dissipation) to approximately 3 ma. it is comfortable driving loads of 5 k or more to within 1v of the power supply rails. oa 2 is intended primarily as a control-voltage processor. its input noise parallels that of oa 3 , and its output drive capability parallels that of oa 1 . that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 8 document 600069 rev 03
applications the circuit of figure 14, page 9, shows a typical application for that 4301. this simple compres - sor/limiter design features adjustable hard-knee threshold, compression ratio, and static gain 1 . the applications discussion in this data sheet will center on this circuit for the purpose of illustrating impor - tant design issues. however, it is posslble to config - ure many other types of dynamics processors with that 4301. hopefully, the following discussion will imply some of these possibilities. signal path as mentioned in the section on theory, the vca input pin is a virtual ground with negative feedback provided internally. an input resistor (r 1 , 20k )is required to convert the ac input voltage to a current within the linear range of the 4301. (peak vca input currents should be kept under 1 ma for best distor - tion performance.) the coupling capacitor (c 1 ,47 f) is strongly recom - mended to block dc cur - rent from preceding stages (and from offset voltage at the input of the vca). any dc current into the vca will be modulated by varying gain in the vca, showing up in the output as ?thumps?. note that c 1 , in conjunction with r 1 , will set the low fre- quency limit of the cir - cuit. the vca output is connected to oa 3 , config - ured as an inverting cur - rent-to-voltage converter. oa 3 ?s feedback compo - nents (r 2 ,20k , and c 2 , 47 pf) determine the constant of cur - rent-to-voltage conver - sion. the simplest way to deal with this is to recognize that when the vca is set for unity (0 db) gain, the input to output voltage gain is simply r 2 /r 1 , just as in the case of a single in - verting stage. if, for some reason, more than 0 db gain is required when the vca is set to unity, then the resistors may be skewed to provide it. note that the feedback capacitor (c 2 )is required for stability. the vca output has approximately 45 pf of capaci - tance to ground, which must be neutralized via the 47 pf feedback capacitor across r 2 . the vca gain is controlled via the e c? terminal, whereby gain will be proportional to the negative of the voltage at e c? . the e c+ terminal is grounded, and the sym terminal is returned nearly to ground via a small resistor (r 3 ,51 ). the vca sym trim (r 5 , 50 k ) allows a small voltage to be applied to the sym terminal via r 4 (300 k ). this voltage adjusts for small mismatches within the vca gain cell, thereby reducing even-order distortion products. to adjust the trim, apply to the input a middle-level, middle-frequency signal (1 khz a t1visa good that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation that 4301 analog engine ic dynamics processor page 9 cr2 10k0 r9 22p c9 1% ec+ ec- in out sym vca + oa3 - out 1% 20k0 r2 51 r3 r16 1% 4k99 + oa2 - gnd c5 100n 1% 590k r17 1% 10k0 r15 +15 r18 ccw cw gain 10k -15 1% 1k43 r14 compression cw ccw r13 10k c3 47uf r6 -15 10k0 1% 22uf c6 in it out ct rms r7 2m00 1% -15 10uf c4 vee vcc that4301 +15 100n c7 c8 100n 1% 4k99 r8 + oa1 - -15 2m00 1% r10 1% 383k r11 cr1 r12 cw 10k ccw threshold +15 20k0 1% r1 47uf c1 300k r4 -15 +15 r5 50k vca sym c2 47pf in figure 14. typical compressor/limiter application circuit 1. more information on this compressor design, along with suggestions for converting it to soft-knee operation, is given in an100, basic compressor limiter design . the designs in an100 are based on that corporation?s 2150-series vcas and 2252 rms detector, but are readily adaptable to the 4301 with only minor modifications. in fact, the circuit presented here is functionally identical to the hard-knee circuit published in an100.
choice with this circuit) and observe thd at the sig - nal output. set the trim for minimum thd. rms-level detector the rms detector?s input is similar to that of the vca. an input resistor (r 6 ,10k ) converts the ac in - put voltage to a current within the linear range of the 4301. (peak detector input currents should be kept under 1 ma for best linearity.) the coupling capacitor (c 3 ,47 f) is recommended to block dc current from preceeding stages (and from offset voltage at the in - put of the detector). any dc current into the detector will limit the low-level resolution of the detector, and will upset the rectifier balance at low levels. note that, as with the vca input circuitry, c 3 in conjunc - tion with r 6 will set the lower frequency limit of the detector. the time response of the rms detector is deter - mined by the capacitor attached to c t (c 4 ,10 f) and the size of the current in pin i t (determined by r 7 , 2m and the negative power supply, ?15v). since the voltage at i t is approximately 0 v, the circuit of figure 14 produces 7.5 aini t . the current in i t is mir - rored with a gain of 1.1 to the c t pin, where it is available to discharge the timing capacitor (c 4 ). the combination produces a log filter with time constant equal to approximately 0.026 c t /i t (~35 ms in the circuit shown). the waveform at c t will follow the logged (deci- bel) value of the input signal envelope, plus a dc off- set of about 1.3 v (2 v be ). this allows a polarized capacitor to be used for the timing capacitor, usually an electrolytic. the capacitor used should be a low-leakage type in order not to add significantly to the timing current. the output stage of the rms detector serves to buffer the voltage at c t and remove the 1.3 v dc off - set, resulting in an output centered aroun d 0 v for in - put signals of about 85 mv. the output voltage increases 6.5 mv for every 1 db increase in input sig - nal level. this relationship holds over more than a 60 db range in input currents. control path a compressor/limiter is intended to reduce its gain as signals rise above a threshold. the output of the rms detector represents the input signal level over a wide range of levels, but compression only oc - curs when the level is above the threshold. oa 1 is configured as a variable threshold detector to block envelope information for low-level signals, passing only information for signals above threshold. oa 1 is an inverting stage with gain of 2 above threshold and 0 below threshold. neglecting the ac - tion of the threshold control (r 12 ) and its associ - ated resistors (r 11 and r 10 ), positive signals from the rms detector output drive the output of oa 1 nega - tive. this forward biases cr 2 , closing the feedback loop such that the junction of r 9 and cr 2 (the output of the threshold detector) sits at -(r 9 /r 8 ) rms out . for the circuit of figure 14, this is ?2 rms out . negative signals from the rms detector drive the output of oa 1 positive, reverse biasing cr 2 and forward biasing cr 1 . in this case, the junction of r 9 and cr 2 rests at 0 v, and no signal level informaion is passed to the threshold detector?s output. in order to vary the threshold, r 12 , the thresh - old control, is provided. via r 11 (383 k ), r 12 adds up to 39.2 a of current to oa 1 ?s summing junction, requiring the same amount of opposite-polarity cur - rent from the rms detector output to counterbalance it. at 4.99 k , the voltage across r 8 required to pro - duce a counterbalancing current is 195 mv, which represents a 30 db change in rms detector input level. since the rms detector?s 0 db reference level is 85 mv, the center of the threshold pot?s range would be 85 mv, were it not for r 10 (2 m ), which provides an offset. r 10 adds an extra ?7.5 atooa 1 ?s summing junction, which would be counterbalanced by 37.4 mv at the detector output. this corresponds to 5.8 db, offsetting the threshold center by this much to 165 mv, or approximately -16 dbv. the output of the threshold detector represents the signal level above the determined threshold, at a constant of about 13 mv/db (from [r 9 /r 8 ] 6.5 mv/db). this signal is passed on to the compression control (r 13 ), which variably attenu- ates the signal passed on to oa 2 . note that the gain of oa 2 , from the wiper of the compression control to oa 2 ?s output, is r 16 /r 15 (0.5), precisely the inverse of the gain of oa 1 . therefore, the compression con - trol lets the user vary the above-threshold gain be - tween the rms detector output and the output of oa 1 from zero to a maximum of unity. the gain control constant of the vca, 6.5 mv/db, is exactly equal to the output scaling constant of the rms detector. therefore, at maximum compres - sion, above threshold, every db increase in input signal level causes a 6.5 mv increase in the output of oa 2 , which in turn cause sa1db decrease in the vca gain. with this setting, the output will not increase despite large increases in input level above threshold. this is infinite compression. for intermediate set - tings of compression ,a1db increase in input sig - nal level will cause less tha na1db decrease in gain, thereby varying the compression ratio. the resistor r 14 is included to alter the taper of the compression pot to better suit common use. if a linear taper pot is used for r 13 , the compression ra - tio will be 1:2 at the middle of the rotation. however, 1:2 compression in an above-threshold compressor is not very strong processing, so 1:4 is often pre - ferred at the midpoint. r 14 warps the taper of r 13 so that 1:4 compression occurs at approximately the midpoint of r 13 ?s rotation. that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 10 document 600069 rev 03
the gain control (r 18 ) is used to provide static gain or attenuation in the signal path. this control adds up to 130 mv offset to the output of oa 2 (from -v + r r 16 17 to -v - r r 16 17 ), which is approximately 20 db change in gain of the vca. c 5 is used to atten - uate the noise of oa 2 ,oa 1 and the resistors r 8 through r 16 used in the control path. all these active and passive components produce noise which is passed on to the control port of the vca, causing modulation of the signal. by itself, the 4301 vca pro - duces very little noise modulation, and its perfor - mance can be significantly degraded by the use of noisy components in the control voltage path. overall result the resulting compressor circuit provides hard-knee compression above threshold with three essential user-adjustable controls. the threshold of compression may be varied over a 30 db range from about ?46 dbv to +14 dbv. the compression ratio may be varied from 1:1 (no compression) to :1. and, static gain may be added up to 20 db. audio performance is excellent, with thd running below 0.05% at middle frequencies even with 10 db of com - pression, and an input dynamic range of over 115 db. perhaps most important, this example design only scratches the surface of the large body of appli - cations circuits which may be constructed with that 4301. the combination of an accurate, wide-dynamic-range, log-responding level detector with a high-quality, exponentially-responding vca produces a versatile and powerful analog engine. the opamps provided in the 4301 enable the designer to configure these building blocks with few external components to construct gates, expanders, de-essers, noise reduction systems and the like. for further information, samples and pricing, please contact us at the address below. that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation that 4301 analog engine ic dynamics processor page 11
notes that corporation; 45 sumner street; milford, massachusetts 01757-1656; usa tel: +1 (508) 478-9200; fax: +1 (508) 478-0990; web: www.thatcorp.com copyright ? 2009, that corporation page 12 document 600069 rev 03

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